1. Field of the Invention
The present invention relates to a method for adjusting a reference current, and more particularly, to a method for adjusting a reference current of a flash memory which has a plurality of nitride read only memory cells, so that not only bit information stored in the flash memory is read correctly, but the flash memory is operated under a predetermined memory speed.
2. Description of the Prior Art
Flash memories have become more and more popular recently, and especially in the area of portable communication devices. The basic structure of a flash memory is similar to that of a MOSFET, including a gate, a drain, and a source. To be more accurate, the flash memory includes a floating gate and a control gate, as the gate of the MOSFET. Of course, there are some kinds of flash memories with no control gate, such as the nitride read only memory (NROM) that was invented by Saifun Semiconductors Ltd.
Differing from other types of flash memory that use a polysilicon or metal floating gate, a nitride read only memory (NROM) uses an oxide-nitride-oxide (ONO) layer as a charge-trapping medium. Due to a highly-compacted nature of the silicon nitride layer, hot electrons tunneling from the MOS transistor into the silicon nitride layer are trapped to form an unequal concentration distribution.
In general, the flash memory has the functions of reading, writing, and erasing. When injecting electrons to the floating gate of the memory cell or injecting electrons to the ONO layer of the memory cell, a threshold voltage, at a low voltage initially, of the memory cell increases relatively and results in a current from the drain to the source decreasing. This is the writing state of the memory cell. While connecting a negative voltage to the control gate, electrons trapped in the floating gate (or trapped in the ONO layer) are ejected to lower the threshold voltage of the memory cell. This is the erasing state. Regardless of the state of the memory cell is in, it is necessary to operate a reading procedure while the bit information stored in the memory cell is read.
A method for reading bit information stored in the memory cell comprises inputting a reference voltage or inputting a reference current. If it is possible to compare the reference voltage or the reference current with an output voltage or an output current from memory cells of the flash memory respectively, in a predetermined time period, the memory speed of the flash memory may be fixed and defined. The larger the difference between the reference current or the reference voltage and the output current or the output voltage is, the faster for completing reading the bit information stored in the flash memory is, representing a faster memory speed of the flash memory. In general, the value of the reference voltage and the reference current are set as an average of the high threshold voltage and the low threshold voltage and an average of a high drain current corresponding to the low threshold voltage and a low drain current corresponding to the high threshold voltage to ensure differences between the reference voltage and the output voltage or between the reference current and the output current are the same. Thus, all memory cells of the flash memory can be operated under an equal memory speed, leading to a flash memory with a consistent memory speed.
The method according to prior art for adjusting the reference voltage is to increase the value of the threshold voltage step by step by injecting electrons, using the varying threshold voltage as a possible reference voltage and comparing the threshold voltage and the reference voltage. The weakness of the described method is the cost, while adjusting the reference voltage, with expelling of electrons the only way to compensate this kind of situation, resulting in a life cycle of the flash memory shorter than originally expected. Another method for adjusting the reference current, as mentioned in U.S. Pat. No. 6038169, is to take advantage of several reference transistors incorporated with a control transistor for generating different reference currents for reading, writing, and erasing respectively. This method has to generate different reference currents for different situations, so it is not very practical to adopt.
It is therefore an object of the present invention to provide a method for generating a reference current for a flash memory. The present invention estimates a value of the reference current and fine-tunes the value of the reference current, and then assures it is possible to read bit information stored in the flash memory in a predetermined time period.
In accordance with the claimed invention, the method comprises inputting a predetermined adjusting current with a value less than that of the initial value of the reference current, lowering the value of the reference current at a predetermined rate, and sensing the difference under the predetermined memory speed between the value of the reference current and the value of the adjusting current according to the output of the sensing cell until it is not possible to sense the difference between the reference current and the adjusting current under a predetermined memory speed.
It is an advantage of the present invention that because the value of the reference current varies during adjustment, that the reference current after adjustment can be used as an index to determine whether the flash memory is capable of being operated under a specific predetermined memory speed or not. If the difference between the output current and the reference current is enough to be sensed in the predetermined time period, there is no doubt the flash memory can be operated under the predetermined memory speed. Even under the condition that the difference between the reference current and the output current is not enough to be sensed, the value of the reference current can be lowered, representing a reduction of the memory speed of the flash memory, until it reaches a level that the difference between the reference current and the output current will be sensed successfully. As a result, the present invention is more flexible than the prior art.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment which is illustrated in the various figures and drawings.